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USB 2.0 Device, Hardware based enumeration RAM Interface

Model No. IPRUSB2SFP001
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USB 2.0 Device, Hardware based enumeration RAM Interface
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The USB 2.0 Device with Avalon Interface - ULPI Support (USB20HR) IP Core is a RAM based USB 2.0 USB IF high-speed certified device core with 32-bit Avalon interface and ULPI interface support. The core supports both High Speed (480 Mbps) and Full Speed (12 Mbps) functionality. The core supports three preconfigured endpoints Control, Bulk IN, and Bulk OUT. It can be configurable for up to 15 IN/OUT endpoints on customer request on chargeable basis. Each configurable endpoint has an endpoint controller that supports interrupt, bulk, and isochronous transfers.

The core has been optimized for Altera FPGAs and its functionality has been verified on the hardware with Altera Quartus II. The package includes ModelSim precompiled library for core simulation and verification.

 

Actual Performance Data

(For ULPI Ram based solution)

 

Benefits

  • Complete solution comprising of core, software and board for easy and quick implementation
  • Reduced risk with proven, compliant technology
  • Premier direct support from SLS IP designers
  • Low system and license cost
  • Software drivers included
  • Ready to use peripheral for Nios® II applications

 

Block Diagram:

Features

  • USB 2.0 USB IF high-speed certified (TID# 70680006)
  • Compliant with USB 2.0 specification
  • Supports both High Speed (480Mbps) and Full Speed (12Mbps)
  • ULPI Interface support
  • Supported Interfaces
    • ULPI (NXP ISP1504 PHY)
  • Pre-Configured for 3 endpoints
    • CONTROL
    • BULK IN
    • BULK OUT
  • Configurable for up to 15 IN/OUT endpoints including Isochronous and Interrupt on customer request at additional cost
  • Software controlled USB enumeration
  • Optimized for use with Altera® Nios® II embedded processor
  • Avalon System Interconnect FabricTM Compliant
  • Optimized LE count

Ready to use development kit and snap on boards (supporting santa cruz expansion header) available now!

 

Example LE Usage

IP Core Supported Families Interface LEs Performance (fmax) Memory Bits
USB20HR Cyclone II
ULPI
2520
130 MHz
18432
Cyclone III
ULPI
2520
135 MHz
18432
Stratix II
ULPI
2130
173 MHz
18432

Please Note: The numbers can change upon core revision. Please contact This e-mail address is being protected from spambots. You need JavaScript enabled to view it for latest figures

 

Verification

  • USB20HR IP core's functionality is verified in ModelSim simulation software using test bench written in Verilog HDL

Application Example : MASS STORAGE

 

CoreCommander board is also available with Pre-built mass storage and video streaming applications.

 

<< Back to USB 2.0 Go to USB20HF >>

* Contact This e-mail address is being protected from spambots. You need JavaScript enabled to view it for details on support

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