The USB20SR is a USB 2.0 USB IF high-speed certified device IP Core. The core is RAM based with 32-bit Avalon interface and supports ULPI interface and Software Enumeration. It supports both High Speed (480 Mbps) and Full Speed (12 Mbps) functionality alongwith three preconfigured endpoints Control, IN, and OUT. It can be configurable up to 15 IN/OUT endpoints on customer request on chargeable basis. Each configurable endpoint has an endpoint controller that supports interrupt, bulk, and isochronous transfers.
The core has been optimized for Altera FPGAs and its functionality has been verified on the hardware with Altera Quartus II. The package includes ModelSim precompiled library for core simulation and verification.
Actual Performance Data
(For ULPI Ram based solution)
Complete solution comprising of core, software and board for easy and quick implementation
Reduced risk with proven, compliant technology
Premier direct support from SLS IP designers
Low system and license cost
Software drivers included
Ready to use peripheral for Nios® II applications
USB 2.0 USB IF high-speed certified (TID# 70680007)
Supports both High Speed (480 Mbps) and Full Speed (12 Mbps)
High speed or Full speed operation selection through Software
ULPI Interface support
Preconfigured for 3 endpoints
Configurable for up to 15 IN/OUT endpoints which supports Bulk, Isochronous and Interrupt functionality on each endpoint on customer request at additional cost
Software controlled CONTROL, IN, and OUT endpoints
Optimized for use with Altera Nios II embedded processor
Avalon System Interconnect Fabric compliant
Optimized LE count
Please Note: The numbers can change upon core revision. Please contact
for latest figures
USB20SR IP core is tested on the CoreCommander board.
USB20SR IP core's functionality is verified in ModelSim simulation software using test bench written in Verilog HDL.
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