Graphics LCD Controller supports LCD display with user programmable resolutions and video timings, thus providing capability with almost all available LCD displays. The core supports number of color modes including 32bpp, 24bpp, 16bpp, and 8bpp (Grayscale). The core can interrupt the host on each horizontal and/or vertical sync pulse.
The core has been optimized for popular FPGA devices and its functionality has been verified on the hardware. It is provided as Altera Quartus II Mega function (Altera SOPC Builder ready component) and can be integrated easily into any SOPC Builder generated system using Nios® II Avalon bus.
Separate Vertical Sync/Horizontal Sync and combined Composite Sync signals, Also composite BLANK signal
User programmable video timing
User programmable video resolution
User programmable video control signal polarization levels
32bpp, 24bpp, 16bpp, and 8bpp (GrayScale) color modes
Operation from a wide range of input clock frequency
Static synchronous design
Example Of LE Usage
Graphics LCD Controller IP core's functionality is verified on NEEK Kit(Cyclone III 3C25) board.
The support services on the phone were commendable. Once we had SLS on the phone and in house they were very knowledgeable - Erik Malone, Qualcomm (USA)
Your software & electronic hardware(PCB Design,assembly etc) design capability is world class. - S.K.Biswas, BHEL (Bhopal, India)
I would like to thank you for your excellent support and willingness to help. I am glad that I did get to know SLS - Mauritz Zondagh, Saab (South Africa)
I'd like to congratulate the winners of the Echelon Innovator of the Year award. GreenWave Reality and SLS represent some of the very best customer benefits and technical achievements of the Smart Grid - Ron Sege, chairman and CEO of Echelon.