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Select from various SLS Communication soft cores to quickly complete your system design.

Interface Core  Description  Supported Devices     USB 3.0 Device  Implementation of Link Layer & Protocol Layer  Support 16-bit and 32-bit PHY layer data interface  Supports CONTROL, BULK transfer without stream  support  USB2.0 backward compatible  Configurable end-point selection  Cyclone III, Stratix II     USB 2.0 Device  Supports both full speed and high speed  Pre-configured for 3 endpoints  Support UTMI + Low Pin Interface (ULPI)  Includes Nios II HAL Driver  Cyclone, Cyclone II, Stratix,  Stratix II, Stratix GX     USB 2.0 Host  Supports both Full Speed (12 Mbps) and High  Speed (480 Mbps)  Support UTMI + Low Pin Interface (ULPI)  Cyclone II, Cyclone III,  Stratix II     USB 1.1  Implementation of USB 1.1 specification for Altera  devices  Supports both full speed and low speed  USB enumeration in hardware  UTMI compliant physical layer interface  CRC generation and checking  Cyclone, Cyclone II, Stratix,  Stratix II, Stratix GX     Ethernet  Implementation of IEEE 802.3 MAC standard core  for Altera devices  Compatible to 10/100 Mbps speed  Transmit, receive FIFO of 32x16 (width x depth)  32 bit CRC generation and checking  Cyclone, Cyclone II, Stratix,  Stratix II, Stratix GX