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Logic Analyzer
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| You are here: Home> IP Cores> Interface Cores |
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| Interface
Cores |
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Easily build interconnection and expansion interfaces
for your SoC design with industry standard IP Cores
from SLS.
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As a solution to System On a Programmable Chip, SLS provides
following set of standard bus interfaces.
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| Interface Core | Description | Supported Devices |
USB 2.0 |
- Supports both full speed and high speed
- Pre-configured for 3 endpoints
- UTMI transceiver and macro-cell interface
- Includes NIOS II HAL Driver
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Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
USB 1.1 |
- Implementation of USB 1.1 specification for Altera devices
- Supports both full speed and low speed
- USB enumeration in hardware
- UTMI compliant physical layer interface
- CRC generation and checking
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Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
Ethernet |
- Implementation of IEEE 802.3 MAC standard core for Altera devices
- Compatible to 10/100 Mbps speed
- Transmit, receive FIFO of 32x16 (width x depth)
- 32 bit CRC generation and checking
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Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
I²C Controller |
- Avalon interconnect compliant
- Byte by byte data transfers is driven by interrupt or bit polling
- Arbitration-lost interrupt with automatic transfer cancellation
- Bus-busy detection
- Static synchronous design
- Implementation in verilog RTL
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MAX® II, Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
I²C Master |
- Phillips I²C specification version 1.0 compliant
- Clock synchronization, arbitration, multi-master systems and fast speed transmission mode
- Software programmable clock frequency and acknowledgment bit
- Static synchronous design
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MAX® II, Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
I²C Slave |
- Compatible with Phillips I²C Standard
- Supports Normal and Fast Speed
- 7 Addressing modes support
- Static synchronous design
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MAX II, Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
I²S |
- Phillips Inter IC Sound (I²S) specification compliant
- Supports variable data width and sampling frequency between 4KHz to 96KHz
- Provides selection for Master/Slave mode
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MAX II, Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
AC’97 |
- Avalon Bus Compliant
- Compliant with AC’97 Revision 2.1(LM4550)
- Variable and Fixed Sample Rate Support, upto
48 KHz
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MAX II, Cyclone, Cyclone II, Cyclone III, Stratix, Stratix II, Stratix GX |
Compact Flash |
- Supports True IDE mode for data transfer
- Avalon Interface compliant
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MAX II, Cyclone, Cyclone II, Stratix, Stratix II, Stratix GX |
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| Download the evaluation version of SLS IP cores from the download section. |
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