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You are here: Home> IP Cores > Memory Cores >Compact Flash
Compact Flash
          
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INTRODUCTION | FEATURES | APPLICATION
Introduction                           

The Compact Flash Controller IP is designed to access the Physical Compact Flash Card using True IDE and True IDE PIO mode. The True IDE PIO mode can be configured from 3 to 6 using software. The Core supports all compact flash card commands.

The IP Core is provided as an Altera Quartus II Megafunction (SOPC builder ready component) and can be integrated easily into any SOPC builder generated system using the Avalon™ Interconnect Fabric.

Features
  • Supports True IDE mode for data transfer
  • True IDE PIO mode can be configured from 3 to 6
  • Avalon Interface Compliant
  • Same core can be used to access compact flash of different sizes
Example LE Usage
IP Core Supported Families LEs Performance (fmax) Memory Bits
Compact Flash
Controller
Stratix 1S10
103
196 MHz
0
Verification
  • Compact Flash IP core's functionality is verified on Stratix 1S10 kit.
Deliverables
  • Evaluation version  
    • Encrypted Core
    • One (1) month evaluation license at no cost (from the License Request page )
    • Demonstration
      • Compact Flash Card information
    • Reference Design with time limited SOF for Stratix (1S10) (QAR file)
    • Nios II Sample Application
      • Compact Flash Card information
    • Documentation
      • IP Core user guide
      • Design from scratch tutorial
  • Full version
    • Encrypted Core
    • One (1) year development license for single project on single node. Other licensing schemes available. Please contact sales@slscorp.com for details
    • Reference Design with full programming file generation support for Stratix (1S10) (QAR file)
    • Nios II Sample Application
      • Compact Flash Card information
    • Documentation
      • IP Core user guide
      • Design from scratch tutorial
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