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You are here: Home> IP Cores > Interface Cores >I²C Controller
I²C Controller
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INTRODUCTION | FEATURES | APPLICATION
Introduction

Avalon Interconnect compliant I²C Controller IP Core from SLS provides serial interface between the master device (processor, controller etc.) and an I²C device. It can work either as a master or a slave. The IP core incorporates all features of the latest Philips I²C (PCF 8584) standard, including clock synchronization, arbitration, multi-master systems and Standard & Fast-speed mode.

The IP Core is provided as an Altera Quartus II Megafunction (SOPC builder ready component) and can be integrated easily into any SOPC builder generated system using the AvalonTM Interconnect Fabric.

Features
  • Avalon interconnect compliant
  • Compatible with Philips I²C (PCF 8584) standard
  • Supports both Master and Slave modes
  • Automatic detection and adoption to bus interface type
  • Multi-master operation
  • Byte by byte data transfers is driven by Iinterrupt or bit polling
  • Arbitration-lost interrupt with automatic transfer cancellation
  • Start/Stop/Repeated Start/Acknowledge generation
  • Start/Stop/Repeated Start detection
  • Bus-busy detection
  • Supports 7 bit addressing mode
  • Operates from a wide range of input clock frequencies
  • Static synchronous design
  • Implementation in verilog RTL
  • Fully synthesizable
Applications
  • Interface with microcontroller memory
  • Communication system
Verifications
  • The SLS I²C Controller IP Core's functionality is verified in ModelSim simulation software using test bench written in Verilog HDL.
  • The I²C Controller's functionality (as a Master) is tested by interfacing with RTC (Real Time Clock) and I²C EPROM on SLS UP3 Education Kit.
  • The I²C Controller's functionality (as a Slave) is tested by communicating with another instance of the same core working as master and also with the SLS I²C Master IP Core on the UP3 Education Kit.
Deliverables
  • Encrypted Core
  • Reference Design/s for standard board/s
  • HAL Driver object code for Nios II Processor
  • Sample Application (.c file) for Nios II Processor
  • Technical Documents
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