The PS/2 IP Core from SLS can be used to interface
standard PS/2 compliant devices such as mice and
keyboard without much effort. The core works purely
on the basis of interrupt.
Features
Avalon interface Complaint
Easy Implementation as all the functionality exists
to communicate with the PS2 device
Simple register interface to the end user. This will
be very easy for software development
Small implementation in terms of FPGA resources
Verilog implementation on RTL Level
Verification
PS/2 Core's functionality is verified in modelsim simulation software using test bench in Verilog HDL
Application Example : Interface of PS/2 IP with NIOS ProcessorView Full size
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