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You are here: Home> IP Cores > Communication Cores >USB 2.0 Device with FIFO Interface
USB 2.0 Device with FIFO Interface
             
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INTRODUCTION | FEATURES | BENEFITS
Introduction

The USB 2.0 Device with FIFO Interface (USB20HF) IP Core supports ULPI interface with Bulk IN and Bulk OUT endpoints. The core supports three preconfigured endpoints Control, Bulk IN, and Bulk OUT. It is Configurable for up to 15 IN/OUT endpoints on customer request on chargeable basis1. Each configurable endpoint has an endpoint controller that supports Interrupt, Bulk, and Isochronous transfers. The USB 2.0 Device IP communicates with the Host through FIFO interface. The core supports both High Speed (480 Mbps) and full Speed (12 Mbps) functionality.

The core has been optimized for Altera FPGAs and its functionality has been verified on the hardware with Altera Quartus II. The package includes ModelSim pre-compiled library for core simulation and verification.

Features
  • USB2.0USBIF high-speed certified (TID# 70710071)
  • Supports both Full Speed (12Mbps) and High Speed (480Mbps) USB operation
  • Supported Interfaces2
    • ULPI (NXP ISP1504 PHY)
  • FIFO Based USB 2.0 Device IP Core
  • Preconfigured for 3 endpoints
    • Control
    • Bulk IN
    • Bulk OUT
  • Configurable for up to 15 endpoints including Isochronous and Interrupt on customer request at additional cost
  • Hardware Based USB Enumeration
  • Optimized LE count
  • Implemented in verilog RTL
Ready to use development kit and Snap On Boards (supporting SantaCruz expansion header) available now!
Example LE Usage
IP Core Supported Families Interface LEs Performance (fmax) Memory Bits
  Cyclone II
ULPI
942
97 MHz
10240
USB20HF Cyclone III
ULPI
1024
160 MHz
10240
  Stratix II
ULPI
797
204 MHz
10240
Please Note: The numbers can change upon core revision. Please contact support@slscorp.com for latest figures
Verification
  • USB20HF IP core's functionality is verified in ModelSim simulation software using test bench written in Verilog RTL
Benefits
  •  Complete solution comprising of core, software and board for easy and quick implementation
  •  Reduced risk with proven, compliant technology
  •  Premier direct support from SLS IP designers
  •  Low system and license cost
  •  Software drivers included
Deliverables
  • Evaluation version  
    • Encrypted core
    • One (1) month evaluation license at no cost (from the License Request page )
    • Demonstration
      • USB Read/Write
    • Reference Design with time limited SOF for CoreCommander development board(QAR file)
    • Simulation library for Modelsim version 6.3g
    • Utilities
      • Enumeration Data Editor
      • USBView
    • Software Drivers
      • Windows and Linux reference drivers (object code)
    • Documentation
      • IP Core user guide
      • Design from scratch tutorial
  • Full version
    • CoreCommander Development Board
    • Encrypted Core
    • One (1) year development license for single project on single node. Other licensing schemes available. Please contact sales@slscorp.com for details
    • Demonstration
      • USB Read/Write
    • Reference Design with full programming file generation support for CoreCommander development board
    • Simulation library for Modelsim version 6.3g
    • Utilities
      • Enumeration Data Editor
      • USBView
    • Software Drivers
      • Windows and Linux reference drivers (object code)
    • Documentation
      • IP Core user guide
      • Design from scratch tutorial
Related Products

 
CoreCommander board
USB 2.0 Host Controller IP Core
Downloads

<< Back to USB 2.0 Go to USB20HR >>
1 Contact support@slscorp.com for details on support.
2 UTMI interface is also available on special request.
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