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You are here: Home> IP Cores > Communications Cores >USB 2.0 Device, Hardware based enumeration RAM Interface (USB20HR)
USB 2.0 Device, Hardware based enumeration RAM Interface (USB20HR)
             
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INTRODUCTION | FEATURES | BENEFITS
 
Introduction

The USB 2.0 Device with Avalon Interface - ULPI Support (USB20HR) IP Core is a RAM based USB 2.0 USB IF high-speed certified device core with 32-bit Avalon interface and ULPI interface support. The core supports both High Speed (480 Mbps) and Full Speed (12 Mbps) functionality. The core supports three preconfigured endpoints Control, Bulk IN, and Bulk OUT. It can be configurable for up to 15 IN/OUT endpoints on customer request on chargeable basis. Each configurable endpoint has an endpoint controller that supports interrupt, bulk, and isochronous transfers.

The core has been optimized for Altera FPGAs and its functionality has been verified on the hardware with Altera Quartus II. The package includes ModelSim precompiled library for core simulation and verification.

Features
  • USB 2.0 USB IF high-speed certified (TID# 70680006)
  • Compliant with USB 2.0 specification
  • Supports both High Speed (480Mbps) and Full Speed (12Mbps)
  • Supported Interfaces
    • ULPI (NXP ISP1504 PHY)
  • Pre-Configured for 3 endpoints
    • CONTROL
    • BULK IN
    • BULK OUT
  • Configurable for up to 15 IN/OUT endpoints including Isochronous and Interrupt on customer request at additional cost
  • Software controlled USB enumeration
  • Optimized for use with Altera® Nios® II embedded processor
  • Avalon System Interconnect FabricTM Compliant
  • Optimized LE count
Ready to use development kit and snap on boards (supporting santa cruz expansion header) available now!
Example LE Usage
IP Core Supported Families Interface LEs Performance (fmax) Memory Bits
  Cyclone II
ULPI
2520
130 MHz
18432
USB20HR Cyclone III
ULPI
2520
135 MHz
18432
  Stratix II
ULPI
2130
173 MHz
18432
Please Note: The numbers can change upon core revision. Please contact support@slscorp.com for latest figures
Verification
  • USB20HR IP core's functionality is verified in ModelSim simulation software using test bench written in Verilog HDL
Benefits
  •  Complete solution comprising of core, software and board for easy and quick implementation
  •  Reduced risk with proven, compliant technology
  •  Premier direct support from SLS IP designers
  •  Low system and license cost
  •  Software drivers included
  •  Ready to use peripheral for Nios® II applications
Deliverables
  • Evaluation version  
    • Encrypted Core
    • One (1) month evaluation license at no cost (from the License Request page )
    • Demonstrations
      • Mass Storage
      • Port Interface
      • Performance Test (Streaming Bulk IN and Bulk OUT)
    • Reference Design with time limited SOF for CoreCommander development board(QAR file)
    • Simulation library for Modelsim version 6.3g
    • Utilities
      • Enumeration data editor
      • Port Interface
      • USBView
    • Nios II Sample Applications (with C code)
      • Port Interface
      • Streaming
    • Software Drivers
      • HAL Driver object code
      • Windows and Linux reference drivers (object code)
    • Documentation
      • IP Core user guide
      • HAL Driver API guide
      • Windows API Guide
      • Design from scratch tutorial
  • Full version
    • CoreCommander Development Board
    • Encrypted Core
    • One (1) year development license for single project on single node. Other licensing schemes available. Please contact sales@slscorp.com for details
    • Demonstrations
      • Mass Storage
      • Port Interface
      • Performance Test (Streaming Bulk IN and Bulk OUT)
    • Reference Design with full programming file generation support for CoreCommander development board
    • Simulation library for Modelsim version 6.3g
    • Utilities
      • Enumeration data editor
      • Port Interface
      • USBView
    • Nios II Sample Applications (with C code)
      • Port Interface
      • Streaming
    • Software Drivers
      • HAL Driver source code
      • Windows and Linux reference drivers (object code)
    • Documentation
      • IP Core user guide
      • HAL Driver API guide
      • Windows API Guide
      • Design from scratch tutorial
  • View the Eval and Full version comparison of the IP core Deliverables.
Actual Performance Data
(For ULPI Ram based solution)
Application Example : MASS STORAGE     ( View Full size )
CoreCommander board is also available with Pre-built mass storage and video streaming applications.
Related Products

Downloads

<< Back to USB 2.0 Go to USB20HF >>
* Contact support@slscorp.com for details on support
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