The Entry Level Tool - II (ELT-II) provides a hardware platform for designing and developing simple and low-end systems based on Altera MAX II Devices.

The Entry Level Tool - II Board features a MAX II EPM240T100Cx device having 240 Logic Elements (LEs) and 8,192 bits of User Flash Memory (UFM). The board also supports vertical migration with the EPM570T100Cx device with 570 Logic Elements (LEs) and 8,192 bits of User Flash Memory (UFM) for larger design support. The board is pre-programmed with the ELT-II Board Diagnostic System, which can be used to verify the board's functionality. The programming files for the ELT-II Board Diagnostic System are also supplied with the board to verify the board's functionality at any time later.

• Powerful Development Board for FPGA designs
  • Based on MAX II CPLD EPM240T100Cx
  • Migration support from EPM240T100Cx to EPM570T100Cx devices for higher density to implement larger designs
• User Interfaces
  • 4-Digit scanning 7-segment LED Display Interface
  • 8x2 On-Off Push Button switches, shared with I/O headers giving flexibility of additional 16 general purpose (+5V tolerant) I/Os
  • 4x4 Push Button Switch Matrix and 8 LEDs, shared and configurable through 4 jumper selection options to use them in any of the possible available combinations
• Multiple Clocks for System Design (2Hz-230.4KHz)
  • 10 clock selection options, available through jumper selection along with the dual crystal support on the board, making the clock selection choices 10x2=20
• Expansion headers for greater flexibility and capacity
• JTAG Configuration and debugging
  • 41 General Purpose (+5V tolerant) I/Os, available on the Altera standard Santa Cruz short expansion connector
• On Board Global System Reset Circuitry
• On-board JTAG circuitry to configure MAX II

• ELT-II Board
• Download Cable
• DC 6V/1.5A Power Supply
• CD ROM
  • Board Reference Design
  • Board Reference Manual
  • Tutorials
  • Quartus II Software

• ELT-II Brochure
• ELT-II Documents
• Self-Study guide for verilog
• Self-Study guide for VHDL