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Job ID SHE02
Job System Hardware Engineer (FPGA/RTL Design Engineer)
Job Profile
  • RTL programming (Verilog/System Verilog)
  • FPGA Design Development
  • Working with FPGA Development Tool (Quartus, Modelsim, Xilinx ISE, Libero etc..)
  • Functional and timing simulation using Verilog/System Verilog
  • RTL Code Optimization to meet timing closure and fit on-chip resources
  • Support all phases of FPGA base product development activities
  • System Architecture Design
  • Testing and troubleshooting of hardware
Department Systems Hardware
Type Full time permanent position
Vacancies 2
Location V.U.Nagar, Gujarat, India.
  • BE/B.Tech in Electronics/Electronics & Communication from recognized university with good academic Record
  • ME/M.Tech in Electronics/VLSI Design from recognized university with good academic Record
  • Experience with SystemVerilog/Verilog for design and verification
  • In-depth understanding of FPGA design flow/methodology, IP integration and design collateral
  • Should be able to develop the small blocks of IP from scratch and do basic functional verification
  • Should be familiar with protocols like SPI, I2C and UART
  • Understanding of standard/specification/application for IP design or system design
  • Self-motivated to learn and to contribute. Ability to work effectively with global teams
Additional Skill(s)
  • Knowledge of Altera Quartus II Tool, Questasim, Modelsim
  • Knowledge of Xilinx tool like ISE, Vivado
  • Knowledge of Microsemi tool like libero
  • Knowledge of USB, Ethernet, external memories such as DDR and QDR RAM
Experience Minimum 2 years of Experience in Semiconductor field
Application Guidelines Candidate must send their application with Subject "[SHE02] Job Application".
Application without JOB ID would not be considered.
Apply This email address is being protected from spambots. You need JavaScript enabled to view it.
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System Level Solutions Inc. 511 N. Washington Avenue,Marshall, Texas 75670. Ph: 001-408-852-0067