USB 2.0 Device, Software based enumeration RAM Interface (USB20SR)
Model No. IPRUSB2SFP003
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The USB 2.0 Device, Software Enumeration (USB20SR) IP Core is a RAM based USB 2.0 device core with 32-bit Avalon interface and ULPI interface support. The core supports both High Speed(480 Mbps) and Full Speed(12 Mbps) functionality. The core supports three preconfigured endpoints Control, IN, and OUT. It can be configured for up to 15 IN as well as OUT endpoints on customer's request at additional cost.
IP core has been implemented in Verilog HDL and its functionality has been verified using different test cases in simulation environment as well as on hardware. It is provided as Altera Qsys Ready component and hence can be easily integrated in Qsys system.
The package includes ModelSim precompiled library of Host-BFM with predefined test cases for IP core simulation and verification.
Actual Performance Data
(For ULPI Ram based solution)
Benefits:
- Complete solution comprising of core, software and board for easy and quick implementation
- Reduced risk with proven, compliant technology
- Premier direct support from SLS IP designers
- Low system and license cost
- Software drivers included
- Ready to use peripheral for Nios® II applications
Block Diagram:
Features:
- Supports both Full speed (12 Mbps) and High Speed (480 Mbps) modes
- Supports Control, Bulk, Interrupt and Isochronous transfers
- Capable to support up to 31 endpoints (1 default control endpoint + 15 IN/OUT endpoints)
- Supports software configurable endpoints
- Supports Suspend, Resume and Remote Wakeup features
- Supports UTMI + Low Pin interface (ULPI) interface
- Supports Asynchronous Avalon clock interface
- Preconfigured for 3 endpoints
- CONTROL
- IN
- OUT
- Configurable Memory depth
- Supports software controlled PHY register access
- Ready to use component for Qsys
- Meets Altera Design Assistant guidelines
- Optimized for use with Altera Nios II embedded processor
- Optimized LE count
Implementation Results:
| Supported Family | Resource Utilization | Memory Blocks | Performance ( Avalon Clock - fmax ) | Performance ( ULPI Clock - fmax ) |
|---|---|---|---|---|
| Cyclone III | 2287 LE | 16 M9K | 250MHz | 121MHz |
| Cyclone IV | 2185 LE | 16 M9K | 250MHz | 132MHz |
| Cyclone V | 985 ALM | 16 M10K | 240MHz | 87MHz |
| Stratix III | 1509 ALUT | 1 M144K | 250MHz | 177MHz |
| Stratix IV | 1505 ALUT | 1 M144K | 260MHz | 166MHz |
| Stratix V | 967 ALM | 8 M20K | 260MHz | 157MHz |
| Arria II | 1505 ALUT | 16 M9K | 270MHz | 140MHz |
| Arria V | 985 ALM | 16 M10K | 285MHz | 101MHz |
| MAX 10 | 2184 LE | 16 M9K | 250MHz | 90MHz |
Please Note: The numbers can change upon core revision. Please contact support@slscorp.com for latest figures
Verification:
- IP Core has been tested by interfacing it with USB 2.0 PHY on SLS CoreCommander development board.
- USB20SR IP core's functionality is verified in ModelSim simulation software using test bench written in Verilog HDL.
Deliverables:
| Contents | Evaluation License | Full Development License |
|---|---|---|
| License Type | One (1) month evaluation license at no cost Note: License can be extended for another month after examining request (Evaluation Now) |
Encrypted IP Core Perpetual license for development Note: Other licensing schemes and source code are also available |
| Reference Design | Included for CoreCommander | Included for CoreCommander |
| Demonstration | Port Interface, Mass Storage, HID Mouse, Performance Test (Streaming Bulk IN and Bulk OUT) | Port Interface, Mass Storage, HID Mouse, Performance Test (Streaming Bulk IN and Bulk OUT) |
| Nios II HAL Drivers | Included in Object Code | Included in Object code Note: Source Code provided on request |
| Nios II Sample Applications (with C code) | Port Interface, Stream Read/Write | Port Interface, Stream Read/Write |
| Drivers | Windows Reference Drivers (object code) | Windows Reference Drivers (object code) Note: Linux Driver available on request |
| Software Library (Compiled version) |
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| Simulation Library | Altera Modelsim | Altera Modelsim |
| Utilities | USB View and Port Interface Editor | USB View and Port Interface Editor |
| Technical Documents |
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| Technical Support | Pre sales support from support team | 1 Year integration support for Altera Quartus II |
Readymade Application with Driver:
- Mass storage
- Video Device
- Audio Device
- HID Device
- Host to Device Bridge
- Host to Host Bridge
- CDC Serial Device
- RNDIS
Downloads:
| << Back to USB 2.0 | Go to USB20HF >> |
* Contact support@slscorp.com for details on support
