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  • What can I do with the evaluation version of your core? How does this compare to the full production version?

    The evaluation version of the eUSB 3.0 IP Core is the OpenCore plus evaluation of this megafunction and it operates in tethered mode. This means that the downloaded program will remain inside the hardware for a particular amount of time only i.e. for 2 hours. Once the program is downloaded and timeout occurs, the hardware evaluation IP Core will stop working. Also, the OpenCore plus hardware evaluation feature adds additional logic to the design that may affect the timing and fitting of the design. Therefore, you can check whether the core meets your design requirements with the evaluation version with this time limited feature and then confidently go for full production version for your final product. Initially, one (1) month evaluation license is provided which can be extended upon request and justification of the product evaluation needs.
  • I want a hardware only solution for my product. I do not intend to use Nios II processor or SOPC builder. Do you have a solution?

    Yes, we do have a solution. Please contact This email address is being protected from spambots. You need JavaScript enabled to view it. for more details.
  • Do you provide the source code for your IP?

    Yes, we can provide the source code of the IP at additional price on request.
  • How many endpoints does the SLS eUSB 3.0 IP Core support?

    The eUSB 3.0 IP Core is pre-configured to support 3 endpoints - Control, Bulk In and Bulk Out. Additional endpoints are supported and can be added as per design requirements at additional cost.
  • Can I customize the vendor ID in the full version?

    Yes, you can customize the vendor ID in full as well as evaluation version of the IP Core. You can customize the value in “sls_eusb.h” file provided in the IP Core setup.
  • How do I request the evaluation version of the core?

    You can request evaluation version of IP Core from page.
  • What is the maximum speed achieved with the core?

    The maximum speed achieved with the IP Core is ~2Gbps for Bulk Out transfer and ~3Gbps for Bulk In transfer.
  • In future, Is USB2.0 support possible with eUSB3.0 IP core ?

    No, there is no any possibility to add USB2.0 support with eUSB3.0 IP core.
  • What features are not supported in eUSB3.0 compare to USB3.0 IP core?

    • List of features are not supported in eUSB3.0 IP core.
    • Power mode support
    • USB2.0 compatibility

  • What are the main Advantages to use eUSB3.0 IP rather then USB3.0 IP core?

    eUSB3.0 IP core is a single chip solution, there is a no need for external Phy chip for physical layer functionality. This IP core reduced interface IOs to 4 and also not required any additional space on the board for External Phy chip.


IP Implementation

  • How do I verify core functionality in hardware ?

    The SLS has developed a eUSB 3.0 board which provides all the accessibility to verify the eUSB 3.0 IP Core on hardware.
  • I run the demo file as per the instructions mentioned in the readme file, but I am still getting 'USB device not recognized' message. How can I solve this problem? Is there some problem with the files I downloaded?

    There is nothing wrong with the demo you downloaded on the board. After successfully downloading the .elf file, run the usbview utility to verify the USB device connection. If the device is not connected properly, you will see the message “Enumeration failed” and in such case you will find the message USB device not recognized. To solve this error, follow the steps below:

    Plug in one end of the 'b' type USB cable to the device and other end to the PC. Check that the USB cable complies with the specification and it is not faulty. Connect the USB cable to another USB port.

  • What is the use of 'EP0 buffer 0 read used word' and 'EP0 buffer1 write used word'?

    “EP0 buffer0 read used word” - indicates number of bytes present in buffer 0 register. “EP0 buffer1 write used word” - indicates number of bytes present in buffer 1 register.
  • How can you make a request UNSTALL?

    There is no need to clear stalled control endpoint from software. It will clear automatically when next set up packet interrupt is generated.
  • Can I read the register status for STALL in the EP0 disable register?

    EP0 disable register is a write only register and you cannot read the register status for STALL.
  • Do we need to have some external FIFO’s to do just enumeration/receiving or sending small packages using EP0?

    No, need for external FIFO’s for enumeration, receiving or sending small packaging data.
  • Is there any buffer/FIFO internally for EP0?

    Buffer memory is present for Endpoint 0 inside the core for IN and OUT data operation. Control Endpoint is handled by Nios II Controller.


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System Level Solutions Inc. 511 N. Washington Avenue,Marshall, Texas 75670. Ph: 001-408-852-0067