eUSB 3.1 FMC (FPGA Mezzanine Card) makes it easier to validate USB 3.1 functionality with Intel^® FPGA having inbuilt serial transceivers. It also contains ULPI PHY chip to validate USB 2.0 functionality.

Block Diagram:

 Features:

• Standard Interface
  • FMC
• USB Interface
  • x2 USB Type C Connectors
  • x2 USB Power switches to facilitate USB Host mode evaluation
• User Interface
  • x4 user defined LEDs
  • General Purpose Ios
• Jumpers
  • For configuring TUSB1002 (USB 3.1 Linear redriver and signal conditioner)
• Clock
  • 25 MHz clock oscillator with clock generator IC for USB 3.1 interface
• Easy to Use
  • Makes it easy to evaluate various SLS’s USB IP cores

Application:

• Evaluation of USB IP cores

Application Examples:

The following example shows the eUSB 3.1 FMC connection with Intel^® Arria^® 10 GX Development Kit.

Deliverables:

• eUSB 3.1 FMC
• USB 3.1 Type C Cable
• Note: The board does not include any Reference design.

Downloads:

• eUSB 3.1 FMC Documents

Related Links:

• eUSB 3.1 Gen2 Device Controller IP Core